---
tags: [entity]
type: entity
topic: stm32-lower
note: 14
created: 2026-07-16
updated: 2026-07-16
---

# Note 14: Ethernet (lower/stm32/05~09)

## Projects

| # | Directory | Description |
|---|---|---|
| 05 | `05_ethernet_test_register` | Ethernet basic init & test (W5500) |
| 06 | `06_ethernet_tcp_server_register` | TCP Server |
| 07 | `06_ethernet_tcp_client_register` | TCP Client |
| 08 | `08_ethernet_udp_register` | UDP communication |
| 09 | `09_ethernet_webserver_register` | Web Server (HTTP) |

## Code Accuracy Audit

### Path Audit

| Claimed Path | Actual Path | Status |
|---|---|---|
| `stm32/stm32/05_ethernet_test_register/...` | `05_ethernet_test_register/...` | **WRONG** — double `stm32/` prefix |
| `.../Hardware/SPI/spi.h` | `05_ethernet_test_register/Hardware/SPI/spi.h` | ✅ Correct (minus double stm32) |
| `.../Interface/Ethernet/eth.c` | `05_ethernet_test_register/Interface/Ethernet/eth.c` | ✅ Correct |
| `.../User/main.c` | `05_ethernet_test_register/User/main.c` | ✅ Correct |
| `stm32/06_ethernet_tcp_server_register/App/TCP/tcp.c` | `06_ethernet_tcp_server_register/App/TCP/tcp.c` | ✅ Correct |
| `stm32/09_ethernet_webserver_register/App/Web/web_server.c` | Exists at `09_ethernet_webserver_register/App/Web/` | ✅ Correct |

### SPI Code (spi.c)

| Claimed by Note | Actual Code | Match? |
|---|---|---|
| `RCC->APB2ENR |= RCC_APB2ENR_IOPBEN` | Line 14 | ✅ Match |
| `RCC->APB2ENR |= RCC_APB2ENR_IOPDEN` | Line 15 | ✅ Match |
| `RCC->APB1ENR |= RCC_APB1ENR_SPI2EN` | Line 16 | ✅ Match |
| CS — PD3: GPIO push-pull | Lines 20-21 | ✅ Match |
| SCK — PB13: AF push-pull | Lines 24-26 | ✅ Match |
| MOSI — PB15: AF push-pull | Lines 29-31 | ✅ Match |
| MISO — PB14: floating input | Lines 34-36 | ✅ Match |
| `SPI2->CR1 |= SPI_CR1_MSTR` | Line 41 | ✅ Match |
| `SPI2->CR1 |= SPI_CR1_SSM; SPI2->CR1 |= SPI_CR1_SSI` | Lines 44-45 | ✅ Match |
| `SPI2->CR1 &= ~(SPI_CR1_CPOL | SPI_CR1_CPHA)` (Mode 0) | Line 48 | ✅ Match |
| `SPI2->CR1 &= ~SPI_CR1_BR` (div 2) | Line 51 | ✅ Match |
| `SPI2->CR1 &= ~SPI_CR1_DFF` (8-bit) | Line 56 | ✅ Match |
| `SPI2->CR1 &= ~SPI_CR1_LSBFIRST` (MSB first) | Line 59 | ✅ Match |
| `SPI2->CR1 |= SPI_CR1_SPE` | Line 62 | ✅ Match |
| `CS_LOW` / `CS_HIGH` (via `GPIOD->ODR`) | Lines 68, 72 | ✅ Match |
| `while ((SPI2->SR & SPI_SR_TXE) == 0) {}` | Line 80 | ✅ Match |
| `SPI2->DR = byte` | Line 84 | ✅ Match |
| `while ((SPI2->SR & SPI_SR_RXNE) == 0) {}` | Line 88 | ✅ Match |
| `return (uint8_t)(SPI2->DR & 0xff)` | Line 92 | ✅ Match |

### W5500 ETH Code (eth.c)

| Claimed by Note | Actual Code | Match? |
|---|---|---|
| Global arrays: `ip = {192,168,44,222}`, `mac = {110,120,130,140,150,160}`, `submask = {255,255,255,0}`, `gateway = {192,168,44,1}` | Lines 12-15 | ✅ Match |
| `SPI_Init()` called first | Line 28 | ✅ Match |
| `user_register_function()` called | Line 31 | ✅ Match |
| RST on PG7: `RCC->APB2ENR |= RCC_APB2ENR_IOPGEN` | Line 48 | ✅ Match |
| `GPIOG->CRL |= GPIO_CRL_MODE7; GPIOG->CRL &= ~GPIO_CRL_CNF7` | Lines 51-52 | ✅ Match |
| `GPIOG->ODR &= ~GPIO_ODR_ODR7` (RST low) | Line 55 | ✅ Match |
| `Delay_us(800)` | Line 57 | ✅ Match |
| `GPIOG->ODR |= GPIO_ODR_ODR7` (RST high) | Line 59 | ✅ Match |
| `setSHAR(mac)`, `setSIPR(ip)`, `setSUBR(submask)`, `setGAR(gateway)` | Lines 68, 78, 80, 82 | ✅ Match |

### Ethernet main.c (05_ethernet_test_register)

Note does not detail main.c content. Actual code shows:
- Calls `USART_Init()`, prints banner, calls `ETH_Init()`, then infinite loop (27 lines)
- No SPI or W5500 API calls in main — all init happens inside `ETH_Init()`

### TCP Server (06_ethernet_tcp_server_register)

Note's state machine description is accurate:
- `SOCK_CLOSED → socket(SN, Sn_MR_TCP, 8080, SF_TCP_NODELAY)`
- `SOCK_INIT → listen(SN)`
- `SOCK_ESTABLISHED → handle Sn_IR_CON, get client IP/port`
- `SOCK_CLOSE_WAIT → close(SN)`

Functions `TCP_RecvData` and `TCP_SendData` match actual code.

### Web Server (09_ethernet_webserver_register)

Note's description of `web_server.c` with `content[]` HTML string, `parse_url_action`, and `do_led_action` matches actual code.

## Summary

**Overall Accuracy**: Very High (95%+)

**Issues Found**:
1. Double `stm32/stm32/` path for project 05
2. `Delay_us(800)` is accurate (comment says 500us but actual code uses 800us delay)
3. All register-level SPI/W5500 code matches perfectly